View PI6C671F_901737.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F
Clock Generator for Pentium Modules
Features
Supports Pentium or Pentium II CPU modules Spread Spectrum capability reduces EMI Low power consumption Four CPU Clocks with VDDQ2 of 3.3V or 2.5V Enhanced drive on CPUCLK0 Seven PCI synchronous clocks (3.3V) One IOAPIC Clock @14.31818 MHz (Power from pin 46), with VDDQ1 of 3.3V or 2.5V Two 48/24 MHz clocks (3.3V) Six/eight SDRAM clocks (3.3V) Three Ref. Clocks @14.31818 MHz (3.3V) Internal crystal loading capacitor Ref. 14.31818 MHz crystal oscillator input Separate 66/60# MHz select pin Separate power management MODE control pin I2C 2-Wire Serial Interface 48-pin SSOP Package (V) and TSSOP (A)
Description
The PI6C671F is a mixed-voltage clock generator designed to provide all timing signals for Intel Pentium/Pentium II module-based motherboards. It provides four CPU, seven PCI, and up to eight SDRAM clocks. Additionally, three reference clocks (same frequency as the crystal) and two selectable 24/48 MHz clocks are available. Pericom design improvements resulted in a low-power device optimized for 2.5V CPU operation. A special spread-spectrum feature may be enabled to minimize EMI. The two-wire I2C serial interface can be used to reduce circuit noise and power consumption. I2C control lets you enable/disable each clock output driver, change CPU frequencies, and select 24 or 48 MHz outputs. A power-down function (pin 44) puts the whole system in a lowpower mode by stopping the crystal oscillator and both PLLs. CPU and PCI clocks may also be stopped by the CPU_STOP# (pin 27), and PCI _STOP# (pin 26) functions. Note: Purchase of I2C components from Pericom conveys a license to use them in an I2C system as defined by Philips.
Block Diagram
Buffers
Pin Configuration
REF1 REF0 VSS XIN XOUT MODE VDDQ3 PCICLK_F PCICLK0 VSS PCICLK1 PCICLK2 PCICLK3 PCICLK4 VDDQ3 PCICLK5 VSS SEL66/60# SDATA SDCLK VDDQ3 48/24MHz 48/24MHz VSS 48 1 47 2 46 3 45 4 44 5 43 6 42 7 41 8 40 9 10 48-Pin 39 38 11 A, V 37 12 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 25 24 VDD REF2 VDDQ1 IOAPIC0 PWR_DWN# VSS CPUCLK0 CPUCLK1 VDDQ2 CPUCLK2 CPUCLK3 VSS SDRAM0 SDRAM1 VDDQ3 SDRAM2 SDRAM3 VSS SDRAM4 SDRAM5 VDDQ3 SDRAM6/CPU_STOP# SDRAM7/PCI_STOP# VDD
3 XIN REF0,1,2 REF OSC XOUT IOAPIC0 VDDQ1
VDDQ2 4 CPUCLK0-3 VDDQ3 PLL1 SEL Up to 8 SDRAM0-7
/2
6
PCICLK0-5
PCICLK_F
48/24 MHz PLL2 48/24 MHz
All trademarks are of their respective companies.
392
PS8137A
03/15/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F Clock Generator for Pentium Modules
Pin Descriptions
Signal Name Xin X out SEL66/60# CPUCLK (0-3) SD R A M SDRAM6/CPU_STOP# SDRAM7/PCI_STOP# MODE PCICLK(0-5) PCICLK_F R E F 0,R E F 1,R E F 2 IOAPIC0 PWR_DWN# 48/24MHz SDATA SD C L K V SS VDD VDDQ3 VDDQ2 VDQ1 Type I O I O O bi-dir bi-dir I O O O O I O I I Ground Power Power Power Power Qty 1 1 1 4 6 1 1 1 6 1 3 1 1 2 1 1 7 2 5 1 1 Pin 4 5 18 42,41,39,38 29,30,32,33,35,36 27 26 6 9 , 1 1 , 1 2 , 1 3 , 1 4, 1 6 8 2 , 1 , 47 45 44 22,23 19 20 Description Crystal oscillator input or input for externally generated reference signal. Crystal oscillator output. Connect to external parallel resonant crystal. Select pin for enabling 66 MHz or 60 MHz. H=66 MHz, L=60 MHz. Has an internal pull-up resistor. CPU & Host clock outputs. Powered by VDDQ2, can be 2.5V or 3.3V. SDRAM clocks 60/66 MHz. Powered by VDDQ3(3.3V). MODE=1: SDRAM6, MODE=0: CPU_STOP#. MODE=1: SDRAM7, MODE=0: PCI_STOP#. Mode Select pin for enabling power management features at pins 26 & 27. Has an internal pull-up resistor. Low skew PCI clock outputs. TTL compatible. Powered by VDDQ3 (3.3V). Free running synchronous PCI clock. Stops when in shut down mode. 14.318 MHz buffered reference clock outputs. IOAPIC0 clock outputs. Powered by VDDQ1, can be 2.5V or 3.3V PWR_DWN#, active LOW. Selectable 48/24 MHz clock output. Powered by VDDQ3 (3.3V). Serial data input for I2C control. Clock input for I2C control.
1 2 3 4 5 6 7 8 9 10
3,10,17,24,31,37,43 Ground pins for the device. 2 5 , 48 7,15,21,28,34 40 46 Power supply for analog circuits and core logic. 3.3V I/O power supply. CPUCLK power supply. Can be either 2.5V or 3.3V. IOAPIC power supply. Can be either 2.5V or 3.3V.
Driver Types
Pin 2 1,47 8 9,11,12, 13.14,16 22,23 26,27,29,30, 32,33,35,36 38,39,41,42 45 Driver Type D C E E C D A B Symbol R E F0 Description 14.318 MHz clock output.
11 12 13 14 15
REF1, REF2 14.318 MHz clock output. PCICLK_F PCICLK 48/24MHz SD R A M C PU C L K IOAPIC0, IOAPIC1 Free running clock during PCICLK stopped. PCI clock outputs TTL compatible 3.3V. 48/24 MHz clock output 3.3V selectable. SDRAM clocks 60/66 MHz. CPU and host clock outputs: 2.5V or 3.3V IOAPIC clock output: 2.5V or 3.3V.
393
PS8137A
03/15/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F Clock Generator for Pentium Modules
Power Management Functions
Any or all clocks can be enabled or shut down via the I2C control interface. All clocks stop in the LOW state. CPU, SDRAM, and PCI clocks wait for one rising edge of PCICLK_F followed by a falling
CPU_STOP# PCI_STOP# X 0 0 1 1 X 0 1 0 1 PWR_DWN# 0 1 1 1 1 CPUCLK, SDRAM LOW LOW LOW 66/60 MHz 66/60 MHz
edge of the clock of interest before settling in the LOW state. To reduce power consumption the PI6C671F clocks may be disabled in accordance with the following table.
PCICLK LOW LOW 33/30 MHz LOW 33/30 MHz Other Clocks LOW Running Running Running Running Crystal & VCOs Off Running Running Running Running
2-Wire I2C Control
The I2C interface permits individual enable/disable of each clock output and test mode enable. The PI6C671F is a slave receiver device. It can not be read back. Sub addressing is not supported. All preceding bytes must be sent in order to change one of the control bytes. Every bite put on the SDATA line must be 8-bits long (MSB first), followed by an acknowledge bit generated by the receiving device. During normal data transfers SDATA changes only when SDCLK is LOW. Exceptions: A HIGH to LOW transition on SDATA while SDCLK is HIGH indicates a "start" condition. A LOW to HIGH transition on SDATA while SDCLK is HIGH is a "stop" condition and indicates the end of a data transfer cycle. Each data transfer is initiated with a start condition and ended with a stop condition. The first byte after a start condition is always a 7-bit address byte followed by a read/write bit. (HIGH = read from addressed device, LOW= write to addressed device). If the device's own address is detected, PI6C671F generates an acknowledge by pulling SDATA line LOW during ninth clock pulse, then accepts the following data bytes until another start or stop condition is detected. Following acknowledgement of the address byte (D2), two more bytes must be sent: 1. "Command Code" byte, and 2. "Byte Count" byte. Although the data bits on these two bytes are "don't care," they must be sent and acknowledged. The I2C interface is disabled when the PWR_DWN# pin is LOW. Preset control register contents are retained.
I2C Serial Configuration
Byte 0: Functional and Frequency Select Clock Register (1 = enable, 0 = disable)
Bit 7 6 5 4 3 2 1 0
Pin No.
@ Powerup 0 0 0 0
Description (Reserved) (Reserved, don't change) (Reserved, don't change) (Reserved, don't change) 48/24 MHz (Freq Select) 1 = 48 MHz, 0 =24 MHz 48/24 MHz (Freq Select) 1 = 48 MHz, 0 = 24 MHz Bit1 1 1 0 0 Bit0 1 : Tri-State 0 : Spread Spectrum 1 : Test Mode 0 : Normal Operation
394
PS8137A 03/15/99
23 22
1 1 0 0
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F Clock Generator for Pentium Modules
Byte 1: CPU 24/48 MHz Active/Inactive Register (1 = enable, 0 = disable)
Bit 7 6 5 4 3 2 1 0 N/A 38 39 41 42 Pin No. 23 22 @ Powerup 1 1 X X 1 1 1 1 Description 48/24 MHz (Active/Inactive) 48/24 MHz (Active/Inactive) (Reserved) CPUCLK4 (Active/Inactive) CPUCLK3 (Active/Inactive) CPUCLK2 (Active/Inactive) CPUCLK1 (Active/Inactive) CPUCLK0 (Active/Inactive)
Byte 4: SDRAMActive/Inactive Register (1 = enable, 0 = disable)
Bit 7 6 5 4 3 2 1 0 Pin No. N/A N/A N/A N/A N/A N/A N/A N/A Description SDRAM15 (Active/Inactive) SDRAM14 (Active/Inactive) SDRAM13 (Active/Inactive) SDRAM12 (Active/Inactive) SDRAM11 (Active/Inactive) SDRAM10 (Active/Inactive) SDRAM9 (Active/Inactive) SDRAM8 (Active/Inactive)
1 2 3 4 5 6 7 8 9 10
Byte 2: PCI Active/Inactive Register (1 = enable, 0 = disable)
Bit Pin No. @ Powerup 7 6 5 4 3 2 1 0 8 16 14 13 12 11 9 X 1 1 1 1 1 1 1 Description (Reserved) PCICLK_F (Active/Inactive) PCICLK5 (Active/Inactive) PCICLK4 (Active/Inactive) PCICLK3 (Active/Inactive) PCICLK2 (Active/Inactive) PCICLK1 (Active/Inactive) PCICLK0 (Active/Inactive)
Byte 5: Peripheral Active/Inactive Register (1 = enable, 0 = disable)
Bit 7 6 5 4 3 2 1 0
Pin No. @ Powerup X X 1 45 1 X 47 1 2 1 1 1
Description (Reserved) (Reserved) (Reserved) IOAPIC (Active/Inactive) (Reserved) REF2 (Active/Inactive) REF1 (Active/Inactive) REF0 (Active/Inactive)
Byte3: SDRAM Active/Inactive Register (1 = enable, 0 = disable)
Byte 6: Optional Register for Possible Future Requirements
11 12 13 14 15
Bit Pin No. 7 6 5 4 3 2 1 0 26 27 29 30 32 33 35 36
@ Powerup 1 1 1 1 1 1 1 1
Description SDRAM7 (Active/Inactive) SDRAM6 (Active/Inactive) SDRAM5 (Active/Inactive) SDRAM4 (Active/Inactive) SDRAM3 (Active/Inactive) SDRAM2 (Active/Inactive) SDRAM1 (Active/Inactive) SDRAM0 (Active/Inactive)
Bit 7 6 5 4 3 2 1 0
Pin Number X X X X X X X X
Description (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved)
395
PS8137A
03/15/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F Clock Generator for Pentium Modules
Byte 7: Frequency Control
DC Specifications
Description (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) FSEL2 FSEL1 FSEL0
Bit 7 6 5 4 3 2 1 0
@ Power up X X X X X 1 1 1
Absolute Maximum DC Power Supply
Symbol VDDQ3 VDD VDDQ2 VDDQ1 Supply Voltage 3.3V Core & I/O 3.3V Core 2.5/3.3V I/O 2.5/3.3V I/O Min. -0.5 -0.5 -0.5 -0.5 Max. Units 4. 6 4.6 4.6 4.6 V
DC Operating Requirements (VDD, VDDQ3=3.3V 5%, VDDQ2=2.5V 5%, TA=0 to 70C)
Symbol VOH2 Parameter 2.5V Output High Voltage 3.3V Output High Voltage 2.5V Output Low Voltage 3.3V Output Low Voltage Dynamic Supply Current Power Down Supply Current Condition IOH = -1mA IOH = -1mA IOL = 1mA IOL = 1mA 66 MHz Unloaded Outputs PWR_DWN# = 0 MODE = Float (high) Min. 2.1 2.4 V 0.4 0.4 Typ. Max. Units
FSEL2 FSEL1 FSEL0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1
Frequency (Reserved) (Reserved) (Reserved) 33 MHz 50 MHz 55 MHz 60 MHz From SEL66/60# pin
IPD IDD V O L3 VOH3 V O L2
55
70
mA
14
20
A
Note: Typical values are at room temperature
396
PS8137A
03/15/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F Clock Generator for Pentium Modules
Driver Specifications
Symbol Parameter Condition Minimum Typical Maximum Units
1
Type A: CPUCLK1-3 2.5V Buffer
2
mA
Iohmin Pull-up Current Iolmin Pull-down Current
Vout = 1.0V Vout = 1.2V
-49 48
3
mA
Type A: CPUCLK1-3 3.3V Buffer Iohmin Pull-up Current Iolmin Pull-down Current Vout = 1.0V Vout = 1.6V -69 63
4 5
Type B: IOAPIC 2.5V Buffer Iohmin Pull-up Current Iolmin Pull-down Current Vout = 1.4V Vout = 1.0V -36 mA 36 Type B: IOAPIC 3.3V Buffer Iohmin Pull-up Current Iolmin Pull-down Current Vout = 1.0V Vout = 1.9V -58 mA 57 Type C: REF1, REF2, 48/24 MHz (3.3V) Buffer Iohmin Pull-up Current Iolmin Pull-down Current Vout = 1.0V Vout = 1.95V -29 mA 29 Type D: REF0, SDRAM (3.3V) Buffer Iohmin Pull-up Current Iolmin Pull-down Current Vout = 2.0V Vout = 1.0V -54 mA 54
6 7 8 9 10
mA
Type E: PCI Clock Buffer Iohmin Pull-up Current Iolmin Pull-down Current Vout = 1.0V Vout = 1.95V -33 30
11 12
Type F: CPUCLK0 2.5V Buffer Iohmin Pull-up Current Iohmax Iohmin Pull-down Current Vout = 0.3V 41 Vout = 1.0V Vout = 2.5V Vout = 1.2V 60 -62 -19 mA
13 14 15
397
PS8137A
03/15/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C671F Clock Generator for Pentium Modules
AC Timing
Symbol tRF tJITTER Duty Cycle tHSKW tHSKSD tPKPS tPSKW tHPOFFSET tSTB Parameter Host CLK rise/fall time, 0.4V - 2.0V Host CLK Jitter Measured the rising edge CLKs at 1.25V for the 2.5V clocks and at 1.5V for the 3.3V clocks Host Bus CLK skew Host to SDRAM PCI CLK period stability PCI Bus CLK skew Host to PCI Clock Offset CLK Stabilization at power-up 1 45 Min. 0.4 Max. 1.6 250 55 250 500 500 500 4 3 ns ms ps Units ns ps %
48-Pin SSOP Package Data
48 .395 .420 10.03 10.67
.291 .299 7.39 7.59
Gauge Plane .010 0.25 1 .02 0.51 .04 1.01
.620 .630 15.75 16.00
.008 0.20 Nom.
.015 0.381 x 45 .025 0.635
.110 2.79 Max
0-8 .025 BSC 0.635 .008 0.20 .0135 0.34
.008 0.20 .016 0.40
X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
48-Pin TSSOP Package Data
48 .236 .244 6.0 6.2
1
.488 12.4 .496 12.6 .047 1.20 Max SEATING PLANE
.004 0.09 .008 0.20 0.45 .018 0.75 .030 .319 BSC 8.1
.0197 BSC 0.50
.007 .010 0.17 0.27
.002 .006 0.05 0.15
X.XX X.XX
DENOTES DIMENSIONS IN MILLIMETERS
Ordering Information
P/N PI6C671FV PI6C671FA Description 48-pin SSOP Package 48-pin TSSOP Package
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
398
PS8137A 03/15/99

▲Up To Search▲

Price & Availability of PI6C671F

	To Download PI6C671F Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .